1. Field of the Invention
One embodiment of the present invention relates to a semiconductor device.
One embodiment of the present invention relates to an object, a method, and a manufacturing method. In addition, one embodiment of the present invention relates to a process, a machine, manufacture, and a composition of matter. One embodiment of the present invention relates to a driving method of a semiconductor device, or a manufacturing method of the semiconductor device.
In this specification and the like, a semiconductor device generally means a device that can function by utilizing semiconductor characteristics. In some cases, a memory device, a display device, an electro-optical device, a semiconductor circuit, or an electronic device includes a semiconductor device.
2. Description of the Related Art
A transistor whose channel formation region includes an oxide semiconductor (OS) (hereinafter such a transistor is referred to as an OS transistor) is known. A variety of semiconductor devices including OS transistors have been proposed.
Patent Document 1 discloses an example in which an OS transistor is used in a dynamic random access memory (DRAM). The OS transistor has an extremely low leakage current in an off state (off-state current); thus, a DRAM having a low refresh frequency and a low power consumption can be formed.
Patent Document 2 discloses a nonvolatile memory including an OS transistor. Unlike the flash memory, the nonvolatile memory has unlimited cycling capability, can easily operate at high speed, and consumes less power.
In such a memory including an OS transistor, the off-state current can be decreased by an increase in the threshold voltage of the OS transistor, so that data holding characteristics of the memory can be improved. Patent Document 2 discloses an example in which an OS transistor has a second gate (also referred to as a back gate) to control the threshold voltage of the OS transistor so that the off-state current is lowered.
In order to hold data of the memory for a long period, a negative potential needs to be continuously applied to the second gate of the OS transistor. Patent Documents 2 and 3 each disclose a structure example of a circuit for driving a second gate of an OS transistor.
Patent Document 4 discloses a method in which a negative potential is generated by a charge pump so as to be applied to a second gate of an OS transistor.